Date & Time:
September 15, 2024
Peppermill Resort and Casino
2707 South Virginia Street, Reno, NV 89502
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Introduction to Characterization of On-Chip ESD Protection


This course is about characterizing the Electrostatic Discharge (ESD) robustness of semiconductor circuits and protection solutions. It includes the typical measurement techniques like HBM, MM, CDM, TLP, VF-TLP, HMM, and IEC 61000-4-2 used in the industry. The material provides an overview of the advantages and disadvantages of each technique.
The tutorial will also cover the interpretation of test results. Emphasis will be placed on understanding the trade-offs and design considerations in optimizing ESD protection devices for different applications.
This tutorial is tailored for professionals in semiconductor device design and testing, seeking to deepen their expertise in ESD characterization. 

Learning Outcomes

  • Understanding ESD Characterization Techniques: Learn about the various techniques and methodologies used in the characterization of ESD protection devices.
  • Familiarity with ESD Test Models: Learn about different ESD test models, such as Human Body Model (HBM), Machine Model (MM), and Charged Device Model (CDM), and their applications in device testing.
  • Understand usage of Test Equipment: Understand the usage of specialized equipment for ESD characterisation, such as Transmission Line Pulse (TLP) testing systems.
  • Interpreting Test Data: Develop the ability to analyze and interpret test results to assess the performance and reliability of ESD protection structures.

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