Transmission Line Pulse Measurements: Parametric Analyzer for ESD On-Chip Protection

Program
ESD Certified Professional-Device/Design Engineer
 
Course Length
Half-day course (approximate)
 
Description

The transmission line pulse (TLP) technique has often been called the parametric analyzer for on-chip ESD protection. The TLP system utilizes rectangular pulses at current levels and time scales similar to human body model (HBM) events. The rectangular pulse of a TLP system allows the measurement of current-voltage (I-V) curves from which can be extracted a variety of device and circuit parameters. These parameters cannot be measured with the double exponential pulse characteristic of HBM. This tutorial explores the parameters to be measured with a TLP system and discusses the importance of the parameters in the design of on-chip ESD protection circuits. Circuit elements and circuits that will be discussed include n and p MOS transistors, npn bipolar transistors, diodes, resistors, metal runners, and power supply clamps. Also, variations in the test structure layouts, important for understanding the properties of the technology, will be discussed.

The Industry Council is an independent Institution focused on target levels of ESD component testing, applying the HBM, MM and CDM standards.

Revised: 6/2/2011 © Copyright, 1999-2012

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